The present invention relates generally to field effect transistors and more specifically to an improved radiation hard MESFET.
Junction isolated, junction field effect transistors (JFET) generally include a source and drain region spaced from each other by a channel region. Surrounding the source and drain region is a high impurity region which acts not only as a guard ring, but as a contact to the bottom gate region which extends below the channel and between the source and drain regions to define the bottom of the channel. The top gate is generally a diffused region of opposite conductivity type to the channel region. By appropriately biasing the top and bottom gates, the channel between the source and drain regions is interrupted. The top gate is generally connected to the bottom gate by extending the top gate diffusion across the channel and into the bottom gate contact. A typical example is shown in U.S. Pat. No. 4,187,514.
In environments which require radiation hard devices, total dose radiation causes inversion around the top gate. This is detrimental to the operation of the JFETs and is undesirable.
Another form of junction field effect transistors is a metal Schottky junction field effect transistor (MESFET). The top gate is of a material which forms a Schottky barrier with the channel region.
Thus, it is an object of the present invention to provide a radiation hard field effect transistor.
Another object of the present invention is to provide a MESFET which is radiation hard.
An even further object of the present invention is to provide a leakage free MESFET.
An even further object of the present invention is to provide a MESFET whose operating characteristics are not effected by variations in dielectric isolated island size.
These and other objects of the invention are attained by using a Schottky top gate which extends across the channel region between the source and drain regions and beyond sides of the dielectric isolation in which the device is built at two points. The bottom gate also extends beyond the dielectric isolation below the surface of the island and intersects the bottom of the source and drain regions. The length of the Schottky barrier top gate and the bottom gate diffusion are sufficiently large so as to extend beyond the dielectric isolation for the maximum anticipated island size which results from the dielectric isolation process. Thus, the top and bottom gates completely define the channel and prevent any leakage current beyond the gates. The source and drain regions which are formed are sufficiently spaced from the dielectric isolation so as not to effect the I.sub.DSS resulting from variation in the island size. A substrate contact is provided to bias the substrate and turn off a parasitic PMOS device between the top and bottom gates.
A bottom gate contact region may be provided extending from the surface down to the bottom gate exterior the channel region defined by the source and drain regions. Preferably, this bottom gate contact region is formed as an annulus encompassing the source and drain regions. In such an application, where it is desirable to connect the top and bottom gates together, the Schottky top gate need only extend across the channel and onto the bottom gate contact region at two points. With this annulus structure, the MESFET structure may be used in other isolated islands whether they be junction or dielectrically isolated.
Other objects, advantages and novel features of the present invention will become apparent from the following detailed description of the invention when considered in conjunction with the accompanying drawings.